Senior Staff Package Design Engineer

Job overview

The Senior Staff Package Design Engineer is an onsite role based in Tempe, AZ. Compensation is not specified for this position, which supports the Manufacturing department in developing advanced semiconductor packaging solutions. This role exists to lead the design and qualification of power SiP, modules, and wafer-level packaging technologies. It contributes to the company's roadmap by optimizing assembly processes, managing subcontractor relationships, and ensuring high-quality production standards for automotive and industrial applications.

What you'll do

• Design and develop package and interconnect methods for Power SiP/modules, WLCSP, and multi-chip modules.
• Define substrate and PCB interface requirements.
• Benchmark and qualify assembly subcontractors (OSAT).
• Resolve process integration issues and establish production controls.

What we're looking for

Skills & competencies

full-time

day shift

tempe az

renesas

semiconductor

package design

power sip

wafer level packaging

engineering

onsite

Work arrangement

• Weekend coverage required

Benefits & perks

• Competitive benefits package provided during hiring process.

Why this role

Requires 10-15 years of experience in power SiP/module and flip-chip LGA packaging.

About the employer

Renesas is hiring for this role. Industry: Engineering Services. Sector: 54.