Back to search

Validation Intern

Renesas · San Jose, CA · Engineering validation team

Compensation

$41.5 – $41.5 /hr

Employment type

Full-time

Work setting

On-site

Location

San Jose, CA

Schedule

Day shift

Posted

Apply for this job

You'll be redirected to the employer's application page.

Job overview

The Validation Intern role is 100% onsite in San Jose, CA, from May 24 through August 13, 2027. Pay is $41.50 per hour. The intern supports Renesas's engineering work on semiconductor products. The intern assists with bench validation, electrical characterization, and performance benchmarking for new silicon products. By developing and executing tests, documenting results, and helping troubleshoot issues, the role contributes to product validation and improved test methods alongside design, test, and marketing teams.

What you'll do

  • Assist in developing and executing bench validation plans for new silicon products, including DDR, MCR, memory controllers, or other integrated circuits
  • collaborate with Design, Test, and Marketing to understand requirements and develop validation strategies
  • use oscilloscopes, BERT, AWG, and other test instruments for electrical characterization and performance benchmarking
  • document procedures, results, and findings in engineering reports
  • assist with debugging and troubleshooting silicon issues
  • contribute to automated test frameworks and validation scripts.

What we're looking for

Skills & competencies
validation intern
renesas
san jose ca
onsite
summer 2027
may 24–august 13
semiconductor validation
silicon products
bench validation
electrical characterization
test automation
python
$41.50/hr
master's degree enrollment
Work arrangement
  • Weekend coverage required

Benefits & perks

  • Possible bonus opportunities.
  • Interns may be eligible for sick leave, holiday pay, and medical, dental, and vision insurance, subject to company policy and applicable law.

Why this role

This is a summer 2027 internship requiring current full-time enrollment in a university master's degree program; December 2027 graduation is preferred. The posting notes possible bonus opportunities and that interns may be eligible for sick leave, holiday pay, and medical, dental, and vision insurance.

About the employer

Renesas is hiring for this role. Industry: Semiconductor and Related Device Manufacturing. Sector: 33.

Additional details

Industry sector
33
Industry
Semiconductor and Related Device Manufacturing
Occupation code
17-3023.00
Apply for this job

You'll be redirected to the employer's application page.

Browse more jobs

Listing ID: e424af9e-f53e-4f1c-b5ef-467d374f1abc

    Validation Intern at Renesas | CollabWORK