Physical Design Engineer

Job overview

The Physical Design Engineer role is onsite in Santa Clara, CA; compensation is not specified. SK hynix memory solutions develops NAND flash and advanced memory technologies for electronic devices and IT infrastructure. The role leads physical implementation of advanced-node system-on-chip designs from synthesis through GDS, optimizing power, performance, and area while driving signoff and tapeout readiness. It also develops design flows and automation and mentors junior engineers in collaboration with cross-functional teams.

What you'll do

• Lead physical design implementation from synthesis through GDS for advanced-node blocks or full-chip SoC designs. Optimize synthesis, placement, clock tree synthesis, and routing
• drive timing closure and signoff
• perform RC extraction and physical verification
• conduct power-integrity analysis and power-grid optimization
• develop flows and automation scripts, mentor junior engineers, and collaborate across teams to meet tapeout schedules.

What we're looking for

Skills & competencies

physical design engineer

santa clara ca

sk hynix

soc integration

asic physical design

advanced nodes

synthesis

placement

clock tree synthesis

routing

sta

gds

Work arrangement

• Weekend coverage required

Benefits & perks

• Medical, dental, vision, life insurance, company 401(k) match, cafeteria, and onsite gym.

Why this role

The description identifies the role as Sr. Staff Physical Design Engineer and specifies 6+ years of hands-on ASIC physical-design experience and proven tapeout success.

About the employer

SK hynix memory solutions America Inc. is hiring for this role. Industry: Semiconductor and Related Device Manufacturing. Sector: 33.