Staff Physical Design Verification Engineer, CAD

Job overview

The Staff Physical Design Verification Engineer, CAD role is onsite in San Jose, CA. The posting lists annual base pay of $130,000–$277,000. The role supports Micron's Memory Design Group and its CMOS integrated-circuit design and layout work. The engineer develops and supports tools, flows, and methodologies that improve memory-design productivity and reliability. By integrating EDA tools, supporting end users, and improving engineering infrastructure, the role helps design teams work efficiently and meet product-development needs.

What you'll do

• Develop tools, flows, and methodologies to increase memory-design productivity and reliability. Integrate commercial EDA tools into design flows
• provide training, documentation, and end-user support
• and collaborate with design, layout, verification, and process teams. Conduct independent research and development of CAD software, identify deficiencies in current tools and flows, evaluate EDA products and improvement opportunities, and develop, maintain, and support engineering infrastructure.

What we're looking for

Skills & competencies

staff physical design verification engineer

cad

memory design

eda tools

cmos

physical layout

design verification

unix

san jose ca

micron technology

$130,000–$277,000/year

Work arrangement

• Weekend coverage required

Benefits & perks

• Medical, dental, and vision plan choices
• income-protection programs
• paid family leave
• paid time off
• and paid holidays. Additional compensation may include benefits, bonuses, and equity.

Why this role

The posting requires a bachelor's or master's degree in a related technical field and five or more years of industry experience, with strong Unix and shell scripting fundamentals.

About the employer

Micron Technology, Inc. is hiring for this role. Industry: Semiconductor and Related Device Manufacturing. Sector: 33.