Analog Designer — Timing

Job overview

The Analog Designer — Timing is an onsite, full-time role in Tempe, AZ. Base salary is $150,000–$250,000 per year. The designer joins the timing product development team to develop high-performance timing products for networking, communications, and data center applications. The role contributes across the product lifecycle, from definition and circuit design through verification and production release. Designing key modules and integrating top-level schematics helps deliver timing products that meet demanding customer performance requirements.

What you'll do

• Contribute to timing products for networking, communications, and data center products
• participate in product definition, process selection, lab verification, and release to production
• design key modules and integrate top-level schematics
• guide layout engineers
• model modules and top-level designs using Verilog-AMS or other languages.

What we're looking for

Skills & competencies

analog designer

timing products

mixed-signal design

pll

ic design

verilog-ams

cadence spectre

tempe az

intellipro group

$150k–$250k/year

staff level

Work arrangement

• Weekend coverage required

Why this role

Requires an MSEE and 3+ years of experience; staff level and above. Experience with high-speed I/O and ESD, CMOS technologies at or below 65 nm, and delta-sigma modulator theory is a plus.

About the employer

IntelliPro Group Inc. is hiring for this role. Industry: Semiconductor and Related Device Manufacturing. Sector: 33.