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Sr. Digital ASIC Design Engineer

Teradyne · Agoura Hills, CA

Compensation

$155k – $248k /yr

Employment type

Full-time

Work setting

On-site

Location

Agoura Hills, CA

Schedule

Day shift

Posted

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Job overview

The Sr. Digital ASIC Design Engineer is an onsite role based in Agoura Hills, CA, with a salary range of $154,900 - $247,800 per year. This position supports Teradyne's Silicon Technology Engineering organization by developing complex mixed-signal ASICs for semiconductor test systems. This role exists to drive digital design activities from architecture definition through silicon bring-up. The engineer collaborates with cross-functional teams to design high-performance digital blocks, integrate IP, and ensure timing closure, contributing to the development of cutting-edge technology that powers industry-leading test systems.

What we're looking for

Skills & competencies
full-time
day shift
agoura hills ca
teradyne
asic design
digital design
semiconductor
engineering
onsite
no on-call
$154.9k-$247.8k/yr
Work arrangement
  • Weekend coverage required

Benefits & perks

  • Comprehensive health benefits, 401(k) retirement plan, and tuition assistance.

About the employer

Teradyne is hiring for this role. Industry: Engineering Services. Sector: 54.

Additional details

Industry sector
54
Industry
Engineering Services
Occupation code
17-2072.00
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