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Senior Digital Design Verification Engineer

Renesas · Austin, TX · Engineering

Employment type

Full-time

Work setting

On-site

Location

Austin, TX

Schedule

Day shift

Posted

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Job overview

The Senior Digital Design Verification Engineer is an onsite role based in Austin, TX. Compensation is not specified for this position, which supports the development of complex power management SoCs. This role exists to independently own the verification of complex digital blocks and major SoC features from requirements analysis through coverage closure.

What you'll do

  • Develop feature-based verification plans
  • build reusable UVM environments
  • develop constrained random tests
  • drive coverage closure
  • debug RTL and testbench failures
  • automate regression workflows
  • communicate status.

What we're looking for

Skills & competencies
full-time
day shift
austin tx
renesas
digital design
verification
soc
power management
engineering
onsite
no weekends
no on-call
Work arrangement
  • Weekend coverage required

Benefits & perks

  • Competitive benefits package.

Why this role

Requires 4+ years of digital design verification experience.

About the employer

Renesas is hiring for this role. Industry: Semiconductor and Related Device Manufacturing. Sector: 33.

Additional details

Industry sector
33
Industry
Semiconductor and Related Device Manufacturing
Occupation code
17-2072.00
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