Principal Package Design Engineer
Compensation
$200k – $240k /yr
Employment type
Full-time
Work setting
On-site
Location
San Jose, CA
Schedule
Day shift
Posted
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Job overview
The Principal Package Design Engineer is an onsite role based in San Jose, CA. The annual salary range is $200,000 - $240,000 USD. This role supports the Semiconductor Power Product Group by leading the development and integration of next-generation packaging solutions. This position focuses on advanced package architecture, assembly processes, and thermal/mechanical reliability. It exists to bring complex semiconductor products from concept through qualification and high-volume production.
What you'll do
- Lead advanced packaging initiatives including WLP, 2.5D/3D, and SiP
- define package architecture with simulation expertise
- drive OSAT and vendor strategy
- collaborate with IC design and manufacturing teams
- oversee layout and stack-up
- perform signal/power integrity and thermal simulations
- develop assembly flows
- resolve NPI issues
- mentor junior engineers.
What we're looking for
- Skills & competencies
- full-timeday shiftsan jose carenesassemiconductorpackagingengineeringonsite$200k-$240k/yradvanced packagingsipbga
- Work arrangement
- Weekend coverage required
Benefits & perks
- Competitive benefits package, bonus opportunities.
Why this role
Requires 5+ years of experience in advanced semiconductor packaging; hybrid location options in San Jose, CA or Austin, TX.
About the employer
Renesas is hiring for this role. Industry: Engineering Services. Sector: 54.
Additional details
- Industry sector
- 54
- Industry
- Engineering Services
- Occupation code
- 17-2112.00
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Listing ID: a573ab83-720d-4ab5-bd0b-a228bce8467f