Sr. Principal/SMTS, IO/Clock Design Engineering
Employment type
Full-time
Work setting
On-site
Location
Boise, ID
Schedule
Day shift
Posted
You'll be redirected to the employer's application page.
Job overview
The Sr. Principal/SMTS, IO/Clock Design Engineering is an onsite role based in Boise, ID. Compensation is not specified for this position, which supports the DRAM IP Design team. This role exists to define, innovate, and optimize high-speed IO and clocking circuits for DRAM products. The engineer develops core strategies and implements engineering solutions to address circuit performance, jitter, and timing challenges.
What you'll do
- Define, innovate, design, optimize, and verify high-speed IO and clocking circuits.
- Apply robust high-speed circuit design techniques.
- Develop accurate modeling and simulation methodology.
- Work with Product Engineering and SI teams to compare silicon performance with simulation results.
- Collaborate with process integration and transistor modeling teams.
What we're looking for
- Skills & competencies
- full-timeday shiftboise idmicronprincipal engineerio designclock designdramip designhigh-speedcircuit designno on-call
- Work arrangement
- Weekend coverage required
Benefits & perks
- Medical, dental, and vision plans
- income protection for illness or injury
- paid family leave
- paid time-off
- paid holidays.
About the employer
Micron Technology, Inc. is hiring for this role. Industry: Semiconductor and Related Device Manufacturing. Sector: 33.
Additional details
- Industry sector
- 33
- Industry
- Semiconductor and Related Device Manufacturing
- Occupation code
- 17-2072.00
You'll be redirected to the employer's application page.
Listing ID: a3e5c3f4-59a5-4bc4-ac0a-3b44b2f5ec8e