Signal and Power Integrity Engineer

Job overview

The Signal and Power Integrity Engineer role is onsite in Ben Lomond, CA, with a stated pay range of $80–$85 per hour. The assignment is 12 months or longer. The engineer supports the CT Server DDR team. The role defines and models DDR PHY channel and power-delivery architectures and validates signal and power integrity on silicon. Working with design, package, board, and firmware teams, the engineer helps resolve issues across the system and supports reliable implementation of the team’s specifications.

What you'll do

• Run system-level channel and power-delivery-network simulations and correlate results with silicon
• process post-silicon validation data
• debug signal- and power-integrity issues across silicon, package, and board
• support cross-functional teams with system, channel, PDN, and decoupling implementation details.

What we're looking for

Skills & competencies

signal and power integrity engineer

ben lomond ca

onsite

ddr phy

signal integrity

power integrity

pdn

post-silicon validation

system-level simulation

python

matlab

$80–$85/hr

Work arrangement

• Weekend coverage required

Why this role

Python and Matlab coding, Ansys or Cadence simulation tools, system-level firmware and hardware debugging, and silicon-to-simulation correlation are listed as preferred experience. A bachelor’s or master’s degree in computer or electrical engineering is specified.

About the employer

US Tech Solutions, Inc. is hiring for this role. Industry: Engineering Services. Sector: 54.