Senior Staff Physical Verification Engineer, Signoff & DRC

Job overview

The Senior Staff Physical Verification Engineer role is listed in Mundelein, IL; the posting does not specify whether work is onsite, hybrid, or remote. Compensation is not specified. The role supports Eliyan’s physical design and chiplet-based product work with foundry and package engineering partners. The engineer owns physical verification signoff across advanced process nodes, helping resolve design-rule and related checks before tapeout. The role contributes to first-pass tapeout readiness through verification strategy, bump and package-level checks, automation, and cross-functional coordination.

What you'll do

• Own physical verification signoff strategy from block through chip top
• define hierarchical DRC methodology
• drive full-chip DRC convergence
• manage foundry waivers
• collaborate on DRC closure
• lead bump planning and top-level bump DRC
• coordinate die and package constraints
• maintain Calibre SVRF/TVF and IC Validator runsets
• drive LVS, ERC, and DFM signoff
• build PV automation using Python, Perl, and Tcl
• report signoff readiness to leadership and foundry partners.

What we're looking for

Skills & competencies

senior staff physical verification engineer

signoff

drc

eliyan

mundelein il

asic

lvs

dfm

advanced process nodes

bump planning

calibre

ic validator

python

chiplet products

Work arrangement

• Weekend coverage required

Why this role

15+ years of ASIC physical verification experience required, including advanced-node tapeouts, multi-foundry expertise, bump planning, package-level DRC, and advanced packaging co-design. The description identifies the role as Senior Staff / Principal Physical Verification Engineer.

About the employer

Eliyan is hiring for this role. Industry: Research and Development in the Physical, Engineering, and Life Sciences (except Nanotechnology and Biotechnology). Sector: 54.