Back to search

Principal ASIC Physical Design Engineer

K2 Space · Los Angeles, CA · ASIC physical design

Compensation

$190k – $280k /yr

Employment type

Full-time

Work setting

On-site

Location

Los Angeles, CA

Schedule

Day shift

Posted

Apply for this job

You'll be redirected to the employer's application page.

Job overview

The Principal ASIC Physical Design Engineer role is onsite in Los Angeles, CA. The base salary is $190,000–$280,000 per year, plus equity. K2 Space is developing high-power satellite platforms for missions from low Earth orbit to deep space. The engineer leads physical implementation of complex systems-on-chip, owning the flow from RTL handoff through GDSII and coordinating with design teams and external partners. The work supports timing closure, power-performance-area optimization, successful silicon implementation, and integration of chips into satellite systems.

What you'll do

  • Own the RTL-to-GDSII flow, including synthesis, floorplanning, place and route, clock-tree synthesis, static timing analysis, physical verification, and sign-off
  • develop physical-design methods, scripts, and automation
  • collaborate with front-end and verification teams
  • drive timing closure across voltage and process corners
  • coordinate package, signal-integrity, power-integrity, and test teams
  • guide external design partners and vendors
  • work with EDA vendors
  • support chip bring-up, debug, production, and spaceflight.

What we're looking for

Skills & competencies
principal asic physical design engineer
asic
physical design
rtl-to-gdsii
soc
satellite systems
los angeles ca
k2 space
$190k–$280k/year
equity
finfet
timing closure
spaceflight
export compliance
Work arrangement
  • Weekend coverage required

Benefits & perks

  • Equity, paid time off, medical, dental and vision coverage, life insurance, paid parental leave, and other benefits.

Why this role

Requires a bachelor's or master's degree in a related engineering field and 10+ years of ASIC physical-design experience for high-performance SoCs. The posting lists end-to-end RTL-to-GDSII expertise, timing closure, advanced FinFET experience, and experience coordinating outsourced teams. The role requires U.S.-person status or eligibility for a federally issued export-control license.

About the employer

K2 Space is hiring for this role. Industry: Aircraft Manufacturing. Sector: 33.

Additional details

Industry sector
33
Industry
Aircraft Manufacturing
Occupation code
17-2071.00
Apply for this job

You'll be redirected to the employer's application page.

Browse more jobs

Listing ID: 8b08313e-24dd-4cb4-b5d8-a84a36ea6c23

    Principal ASIC Physical Design Engineer | CollabWORK