Analog Design Engineer

Job overview

The Analog Design Engineer role is onsite in Agoura Hills, CA, with a base salary range of $127,500–$204,100 per year. Teradyne develops automated test solutions that help customers bring increasingly complex semiconductor devices to market. The engineer develops high-speed analog and mixed-signal ASICs for automatic test equipment, contributing from circuit specification and implementation through validation and production test. The role collaborates across design, validation, test, and EDA teams and uses automation and AI-assisted workflows to improve design and verification work.

What you'll do

• Design and optimize high-speed analog and mixed-signal circuits from specification through transistor-level implementation
• validate and integrate designs using Cadence EDA tools across PVT corners
• support layout and ASIC integration
• participate in silicon characterization, debug, validation, and production test
• develop automation, scripting, and AI-assisted workflows
• collaborate across design, validation, test, and EDA teams.

What we're looking for

Skills & competencies

analog design engineer

mixed-signal asic

cmos circuit design

semiconductor test

cadence eda

silicon characterization

agoura hills ca

teradyne

full-time

$127,500–$204,100/year

msee preferred

python

verilog

Work arrangement

• Weekend coverage required

Benefits & perks

• Medical, dental, vision, flexible spending accounts, retirement savings plans, life and disability insurance, paid vacation and holidays, and tuition assistance.

Why this role

Semiconductor Test Division role focused on high-speed analog and mixed-signal ASICs, with AI-assisted design workflows and silicon characterization.

About the employer

Teradyne is hiring for this role. Industry: Instrument Manufacturing for Measuring and Testing Electricity and Electrical Signals. Sector: 33.