DRAM Power Architect (MTS)

Job overview

The DRAM Power Architect (MTS) is an onsite role based in Boise, ID, with compensation not specified. This position supports the DRAM Engineering Group at Micron Technology, Inc. by analyzing and modeling power requirements for advanced memory solutions. This role exists to translate system-level power requirements into actionable analysis and modeling tasks. It contributes to the company's goals by optimizing DRAM architecture for power, performance, and efficiency in high-performance computing applications.

What you'll do

• Understand system-level DRAM power requirements
• perform power analysis and workload-based modeling
• develop and apply power models
• support definition of power targets
• contribute to DRAM power-related feature development
• collaborate with cross-functional teams to validate results
• analyze competitor products and industry trends.

What we're looking for

Skills & competencies

full-time

day shift

boise id

dram

power architecture

micron technology

semiconductor

modeling

performance optimization

benchmarking

Work arrangement

• Weekend coverage required

Benefits & perks

• Choice of medical, dental, and vision plans
• paid family leave
• robust paid time-off program.

Why this role

Focus on high-volume manufacturing and advanced memory technology optimization.

About the employer

Micron Technology, Inc. is hiring for this role. Industry: Engineering Services. Sector: 54.