Manager, DRAM Final Test Applications Engineering, Memory Test

Job overview

The Manager, DRAM Final Test Applications Engineering, Memory Test role is onsite in San Jose, CA. The posting states a base salary range of $189,800–$303,700 per year. Teradyne’s Memory Test Division supports memory semiconductor manufacturers with production test solutions. The role leads applications engineers supporting global DRAM customers and production deployments. It advances customer success by guiding technical engagements, resolving escalations, supporting product introductions and production ramps, and bringing customer requirements into product strategy and roadmaps.

What you'll do

• Lead, mentor, and develop applications engineers
• set team priorities and resource plans
• lead customer engagements, technical escalations, device bring-up, and production ramps
• provide technical leadership for DRAM production test methods, characterization, yield improvement, and deployment
• collaborate with engineering, product management, marketing, and sales on product roadmaps
• represent customer requirements and industry trends.

What we're looking for

Skills & competencies

applications engineering manager

dram final test

memory test

san jose ca

teradyne

semiconductor test

dram

customer engagements

production ramps

yield improvement

engineering leadership

travel up to 25%

Work arrangement

• Weekend coverage required

Benefits & perks

• Medical, dental, vision, flexible spending accounts, retirement savings plans, life and disability insurance, paid vacation and holidays, and tuition assistance.

Why this role

Focuses on DRAM final test methodologies and production deployments, including DDR, LPDDR, and GDDR memory technologies; travel may be required up to 25% domestically and internationally.

About the employer

Teradyne is hiring for this role. Industry: Semiconductor and Related Device Manufacturing. Sector: 33.