Principal Engineer - FPGA/ASIC Design - Reston, VA
Compensation
$152k – $247k /yr
Employment type
Full-time
Work setting
On-site
Location
Washington, VA
Schedule
Day shift
Posted
Travel
Required
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Job overview
The Principal Engineer - FPGA/ASIC Design is a full-time, hybrid role based in Reston, VA. The annual salary range is $152,033 - $247,054. This role exists to design, verify, integrate, and test FPGA/ASIC solutions for engine control systems. The engineer will develop architectures, run simulations, and prepare documentation to support Rolls-Royce's flagship programs.
What you'll do
- Design and develop custom digital devices (ASIC or FPGA).
- Develop RTL using VHDL, Verilog, or SystemVerilog.
- Verify products to DO-254 standards and achieve timing closure.
What we're looking for
- Skills & competencies
- full-timehybridreston vaprincipal engineerfpgaasicengineeringtechnology$152k-$247k/yru.s. citizen
- Work arrangement
- Weekend coverage required
Benefits & perks
- Bonus plan, health, dental, vision, disability, life insurance, 401(k) with match, and tuition reimbursement.
Why this role
Hybrid work schedule with 25% travel between Indiana sites.
About the employer
Rolls Royce is hiring for this role. Industry: Engineering Services. Sector: 54.
Additional details
- Industry sector
- 54
- Industry
- Engineering Services
- Occupation code
- 17-2072.00
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Listing ID: 65b610e1-1f81-4f24-b8f4-d31bef24b706