Senior DFT Design Engineer, Machine Learning Acceleration

Job overview

The Senior DFT Design Engineer, Machine Learning Acceleration role is an onsite position based in Austin, TX. Compensation is not specified in the posting, and this role supports the Annapurna Labs team in designing custom SoCs for AWS machine learning servers. This role exists to define and develop state-of-the-art Design for Test (DFT) architectures. The engineer will ensure high design quality and manage project timelines from RTL through silicon bring-up.

What you'll do

• Define and develop state-of-the-art DFT architectures for advanced technology nodes.
• Work with block designers and physical design teams to implement efficient DFT solutions.
• Act as the primary point of contact for cross-functional stakeholders.
• Mentor and develop junior engineers.
• Manage project timelines and deliverables for DFT implementation.

What we're looking for

Skills & competencies

full-time

austin tx

dft

asic design

machine learning

hardware engineering

atpg

jtag

onsite

no on-call

no travel

Work arrangement

• Weekend coverage required

Benefits & perks

• Health insurance, 401(k) matching, paid time off, parental leave, sign-on payments, and RSUs.

Why this role

Focus on advanced DFT architectures for machine learning silicon.

About the employer

Annapurna Labs (U.S.) Inc. is hiring for this role. Industry: Custom Computer Programming Services. Sector: 54.