DRAM Memory Design Engineer - Principal | MTS | SMTS
Employment type
Full-time
Work setting
On-site
Location
Boise, ID
Schedule
Day shift
Posted
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Job overview
The DRAM Memory Design Engineer - Principal | MTS | SMTS role is an onsite position based in Boise, ID. Compensation is not specified for this role, which supports the DRAM Engineering team at Micron Technology, Inc. This role exists to design and optimize next-generation DRAM products. The engineer will lead circuit development, influence technical direction, and mentor other engineers while working on high-performance memory solutions.
What you'll do
- Design and optimize digital and analog circuits
- lead circuit development and silicon validation
- drive layout optimization and tape-out activities
- advance AI-assisted design
- provide technical leadership.
What we're looking for
- Skills & competencies
- full-timeday shiftboise idmicron technologydrammemory designsemiconductorengineeringai toolsno on-call
- Work arrangement
- Weekend coverage required
Benefits & perks
- Medical, dental, and vision plans
- paid family leave
- paid time-off program
- paid holidays.
Why this role
Senior-level role with leadership and mentorship responsibilities in DRAM design.
About the employer
Micron Technology, Inc. is hiring for this role. Industry: Computer Systems Design Services. Sector: 54.
Additional details
- Industry sector
- 54
- Industry
- Computer Systems Design Services
- Occupation code
- 17-2061.00
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Listing ID: 4e2e89b1-024e-4ca7-bc83-21d497cd4524