Senior / Principal Layout Engineer - Module Architecture (Pathfinding)
Compensation
$202k – $344k /yr
Employment type
Full-time
Work setting
On-site
Location
San Jose, CA
Schedule
Day shift
Posted
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Job overview
The Senior / Principal Layout Engineer is an onsite role based in San Jose, CA, with a salary range of $202,000 to $344,000 per year. This position drives pathfinding and architecture exploration for next-generation memory modules. The role exists to define design envelopes and influence architecture decisions through layout-driven insights. It contributes to the company's goals by enabling future bandwidth and density targets for memory technologies.
What you'll do
- Leads layout-driven architecture exploration
- evaluates routing topology
- collaborates with SI/PI teams
- defines design rules
- mentors junior engineers
- influences industry standards.
What we're looking for
- Skills & competencies
- full-timeday shiftsan jose calayout engineersemiconductormemory technologyarchitectureengineeringonsite$202k-$344k
- Work arrangement
- Weekend coverage required
Benefits & perks
- Medical, dental, vision, retirement plans, paid time off, and paid family leave.
Why this role
Requires 8-15+ years of experience in high-speed PCB layout and deep expertise in DDR/LPDDR memory interfaces.
About the employer
Micron Technology, Inc. is hiring for this role. Industry: Engineering Services. Sector: 54.
Additional details
- Industry sector
- 54
- Industry
- Engineering Services
- Occupation code
- 17-2061.00
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Listing ID: 4b05aa65-d656-4c44-bb78-a202748b58c8