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Hardware Engineering Manager (Memory Test Division)

Teradyne · San Jose, CA

Compensation

$167k – $267.1M /yr

Employment type

Full-time

Work setting

On-site

Location

San Jose, CA

Schedule

Day shift

Posted

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Job overview

The Hardware Engineering Manager is an onsite role based in San Jose, CA, with a base salary range of $167,000 to $267,100,000 per year. This position supports Teradyne's Memory Test Division by leading engineering teams in the transition of new semiconductor test platforms into high-volume manufacturing. The role exists to bridge the gap between product development and manufacturing, ensuring successful product launches, reliability, and operational efficiency. It contributes to Teradyne's goal of delivering sophisticated test and automation solutions for next-generation electronic devices.

What we're looking for

Skills & competencies
full-time
day shift
san jose ca
teradyne
engineering manager
hardware engineering
semiconductor
npi
manufacturing
leadership
$167k-$267m/yr
onsite
Work arrangement
  • Weekend coverage required

Benefits & perks

  • Medical, dental, vision, retirement savings, life/disability insurance, tuition assistance

About the employer

Teradyne is hiring for this role. Industry: Engineering Services. Sector: 54.

Additional details

Industry sector
54
Industry
Engineering Services
Occupation code
17-2072.00
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