ASIC Verification Engineer

Job overview

The ASIC Verification Engineer role is onsite in North Reading, MA, with compensation of $60–$95 per hour. The engineer supports Teradyne products as part of the ASIC Reference Model team. The listing describes a 12-month contract with a contract-to-permanent possibility. The engineer plans and executes verification for complex ASIC and SoC designs, develops reference models and verification environments, and collaborates across engineering disciplines. The work helps ensure feature coverage, resolve functional issues, and deliver verification milestones aligned with project objectives.

What you'll do

• Plan verification, testbench architecture, and execution for ASIC and SoC designs
• develop and maintain SystemC and SystemVerilog/UVM reference models and environments
• create test cases and reusable components
• collaborate with design, architecture, firmware, software, and validation teams
• use simulation, coverage-driven verification, assertions, and formal methods
• debug functional issues during verification and silicon bring-up
• define requirements, milestones, and quality metrics
• deliver work on schedule.

What we're looking for

Skills & competencies

asic verification engineer

north reading ma

artech llc

asic

soc

systemc

systemverilog

uvm

c++

functional verification

python

$60–$95/hour

12-month contract

contract-to-permanent

Work arrangement

• Weekend coverage required

Why this role

ASIC Reference Model team role involving SystemC, C++, SystemVerilog/UVM, and complex digital design verification.

About the employer

Artech LLC is hiring for this role. Industry: Engineering Services. Sector: 54.