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Semiconductor Design Engineer (Compute Test)

Teradyne · Tualatin, OR · Compute Test Division Engineering

Compensation

$155k – $248k /yr

Employment type

Full-time

Work setting

On-site

Location

Tualatin, OR

Schedule

Day shift

Posted

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Job overview

The Semiconductor Design Engineer is an onsite role based in Tualatin, OR. The salary range is $154,900 - $247,800, supporting Teradyne's compute test division. This role develops advanced test instrumentation for semiconductor manufacturing. The engineer leads architecture, design, and validation efforts, collaborating with cross-functional teams to ensure high-performance digital design solutions.

What you'll do

  • Lead architecture and design, develop digital design solutions, collaborate with verification teams, execute characterization experiments, and mentor junior engineers.

What we're looking for

Skills & competencies
full-time
day shift
tualatin or
teradyne
semiconductor
design engineer
fpga
digital logic
hardware
onsite
Work arrangement
  • Weekend coverage required

Benefits & perks

  • Robust health benefits, 401k, paid vacation, and tuition assistance.

Why this role

High-performance role in a global test and automation company.

About the employer

Teradyne is hiring for this role. Industry: Instrument Manufacturing for Measuring and Testing Electricity and Electrical Signals. Sector: 33.

Additional details

Industry sector
33
Industry
Instrument Manufacturing for Measuring and Testing Electricity and Electrical Signals
Occupation code
17-2112.00
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